Fast Parallel Memetic Algorithm for Vector Quantization Based for Reconfigurable Hardware and Softcore Processor
Tsung-Yi Yu, Wen-Jyi Hwang and Tsung-Che Chiang
ADVANCES IN SWARM INTELLIGENCE Lecture Notes in Computer Science, 2010, Volume 6145/2010, 479-488, doi: 10.1007/978-3-642-13495-1_59
A novel parallel memetic algorithm (MA) architecture for the design of vector quantizers is presented in this paper. The architecture contains a number of modules operating memetic optimization concurrently. Each module uses steady-state genetic algorithm (GA) for global search, and K-means algorithm for local refinement. A shift register based circuit for accelerating mutation and crossover operations for steady state GA operations is adopted in the design. A pipeline architecture for the hardware implementation of K-means algorithm is also used. The proposed architecture is embedded in a softcore CPU, and implemented on a field programmable logic array (FPGA) device for physical performance measurement.